-Aviral Mittal
email: avimit {att} yhaoo dat cam.{this is to confuse the bots, if you are a human, you will be able to make out my correct email ID}

AXI and AHB has been existing for quite a while.
While its very common knowledge to know that AXI
offers advantages over AHB in terms of performance,
its rather uncommon to know the actual reasons
and circumstances in which AXI would offer performance boost.

This literature attempts to explain the actual reasons and the circumstances
in which AXI offers performance boost.

There are 2 basic reasons why AXI may be faster:

1. Simplex Vs Duplex Transfers
AXI has completely independent channels for read/write, which enables full duplex mode of data transportation. That is to say read and writes can take place simultaneously, giving 2x boost over AHB in any circumstances. However this will ONLY be possible when the slave is able to process 1 read and 1 write operation simultaneously in 1 clock cycle. Which in many cases will be possible, e.g. if the slave is a dual port SRAM which can process 1 read and 1 write transaction simultaneously. Also in this example we are considering 1 Master and 1 Slave. But in case of multiple slaves, the master can send read transaction to 1 slave and write to other slave, even if the slave(s) cannot handle more than 1 transactions in single clock cycle.

To make more clarity, in a system where there is only 1 master and only 1 slave, the slave is unable to process read and write in 1 single clock cycle simultaneously and both master and slave are in single synchronous clock domain with no clock delay between the master and the slave there wont be any difference in performance between AXI and AHB. The AXI will only consume more power and area.

2. When there are clock cycle delays between a Master and a responding slave.
-This is usually when the Master clock and slave clock is Async, and a there is a clock domain crossing bridge.

It can be  observed in the diagram shown below, that that as the number of OTs (outstanding transaction) increase in AXI, the efficiency increases. It can also be observed that with 1 OT, again, the performance will be comparable, if we are doing only reads or only writes.
In AXI case, since the system is able to issue outstanding transactions (OT), i.e. able to issue addresses without waiting for data to return, there is only a initial delay, and then the continuous flow of data follows.
In AHB this is not possible. The AHB cannot issue another transaction, without first receiving the response to its only transaction, which it can issue at a time.


It is to be noted again, that if there are no clock delays between a master and a slave, and if we assume only 1 master and 1 slave in the system, then again the AXI performance will be equal to AHB performance, if we are doing only reads or only writes.