<?xml version="1.0" encoding="iso-8859-1" ?>

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<!--  Checked In          : $Date: 2013-04-10 14:52:50 +0100 (Wed, 10 Apr 2013) $ -->
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<!--  Revision            : $Revision: 243490 $                             -->
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<!--  Release Information : Cortex-M System Design Kit-r1p0-01rel0
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<!--  Purpose             : Example XML file, defining an interconnect for  -->
<!--                        2 AHB Masters and 3 AHB Slaves.                 -->
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<cfgfile>

  <!-- - - - - *** DO NOT MODIFY ABOVE THIS LINE *** - - - - - - - - - - -  -->

  <!-- Global definitions -->

  <architecture_version>ahb2</architecture_version>
  <arbitration_scheme>fixed</arbitration_scheme>
  <routing_data_width>32</routing_data_width>
  <routing_address_width>32</routing_address_width>
  <user_signal_width>32</user_signal_width>
  <bus_matrix_name>cm3_matrix</bus_matrix_name>
  <input_stage_name>cm3_in</input_stage_name>
  <matrix_decode_name>cmsdk_MyDecoderName</matrix_decode_name>
  <output_arbiter_name>cmsdk_MyArbiterName</output_arbiter_name>
  <output_stage_name>cm3_out</output_stage_name>


  <!-- Slave interface definitions -->

  <slave_interface name="S0">
    <sparse_connect interface="M0"/>
    <sparse_connect interface= "M1"/>
    <address_region interface="M0" mem_lo="00000000" mem_hi='0000ffff' remapping='none'/>
    <address_region interface="M1" mem_lo="00010000" mem_hi="0001ffff" remapping='none'/>
  </slave_interface>


  <slave_interface name="S1">
    <sparse_connect interface="M0"/>
    <sparse_connect interface="M1"/>
    <address_region interface="M0" mem_lo="00000000" mem_hi='0000ffff' remapping='none'/>
    <address_region interface="M1" mem_lo="00010000" mem_hi="0001ffff" remapping='none'/>
  </slave_interface>

  <slave_interface name="S3">
    <sparse_connect interface="M3"/>
    <sparse_connect interface="M2"/>
    <address_region interface="M3" mem_lo="20000000" mem_hi='200fffff' remapping='none'/>
    <address_region interface="M2" mem_lo="40000000" mem_hi="4000ffff" remapping='none'/>
  </slave_interface>