System on Chip Architecture
Fundamentals: By Aviral Mittal avimit att yahu dat cam
1. I/O Pads:
For a SoC to be able to interact with the outside world, the least
is needed are input/output pins.
Since these pins also called ports will carry information from
inside the SoC to outside the SoC and vice-versa, these I/O ports
are specially design circuits, which are called I/O pads. The
electrical characteristics of off-chip metal is quite different to
the electrical characteristics of on-chip metal, for example outside
the SoC chip, these I/O pads have to drive very thick metal wires
while inside the chip those wires are very thin.
So we need especially design I/O pads which special circuitry to
deal with harsh outside world and relatively comfortable inside
A collection of these I/O pads for a chip is also often termed as
I/O Pad Ring, as usually these pads are arranged in the form of a
Ring around at the periphery of the chip surrounding the 'core'
Each I/O pad can be either input pad, or an output pad or a
Then Each I/O pad can be either analog pad to carry analog signal or
a digital pad to carry digital signal.
And then there are power pads such as VDD pad and GND pad for
supplying power to the chip.
The I/O pad serve one more rather secondary purpose. This is to
protect the chip-circuit from over-voltage pulses. This may be due
to electrostatic charges, or due to human error while accidentally a
user has applied higher than specified voltage to a pin.
What are pad drivers?
The output pads are required to drive relatively high amount of
currents, as these will connect to off-chip metallic wires, which
may connect to other circuits. For this purpose there are special
purpose circuits designed to provide high current to the output
pads. These are often called pad drivers.
What are GPIOs?
While some pads on the SoC has specific purpose, others can be
general purpose. These general purpose pads are calld GPIOs. They do
not have a defined function as such, but can be very useful to add
functionality to the post-production device. These GPIOs can easily
be made available to the SoC software which can then use it for a
variety of purposes.
I/Os dedicated to DFT:
There is another function associated with the I/O pads. This is to
help with the manufacturing test of the SoC. These pads usually do
not participate in functionality of the SoC, but helps in the
testing of the Chip. So the SoC has some core logic and I/O pads
dedicated to what is called 'Design For Test' Logic or simply DFT
logic. More about DFT is presented in later section(s).
Pull-up/Pull down functionality associated with I/Os