ARM Based SoC design Tutorial : Practical 1.
-Aviral Mittal.

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Section 6:
This section covers the Simulation of the SoC design using Xilinx Vivado.
Xilinx Vivado is available free of charge to download from Xilinx Web Site
All the RTL for this tutorial can be downloaded here. (you will have to provide your e-mail ID)

Xilinx Vivado Tutorial: Build your own System on Chip Design.

Firstly, the user will create a new project in Vivado
The user will then add all the RTL files to the project
The user will then run a basic synthesis
The user will then run Elaboration
The user will then write a small testbench and add the same to the project
The user will then run Simulation

Step 1. Creating a Project:

After downloading And installing Xilinx Vivado, Click on the Vivado icon to launch Vivado
Following Window will open:

A new Project will now be created: Click on Quick Start -> Create Project >
Following Window will show up

Click on Next >

Following window will show-up asking for the user to fill in 'Project Name' and 'Project Location'

You can choose any name of the project, here the project name is chosen to be 'soc_cm3'
Choose a working directory, here it is 'C:/Users/<windows user name>/downloads/asic_design/xilinx'

Click on Next >
Following window will shop up, asking for the user to put in 'Project Type'
Select 'RTL Project' from the list as shown below:

Click on Next >

'Add Sources' Window will show up asking the user to add project files as shown below:

Click on 'Add Files' , 'Add source Files' window will show up as shown below:

Browse to the directory where your source files are:
Your Bus Matrix files should be here:
Browse to this directory, and select all files as shown below and click on OK.

Similarly add the following files, by clicking on 'Add Files' again and repeating the process:

Ignore the 'work' directory as seen above, you may not even see it.

All files have now been added. Click on Next >

Add Constraints Window will Show up, Ignore it for the moment and click on Next >

'Default Part' Selection Window will show up, select the following:
Family -> Artix-7
Speed -> -1
Rest keep as they are:
Then select the part called xc7a100tcsg324-1
All this is shown below:

Click on Next >
'New Project Summary Window will show up' as shown, click on 'Finish'

A few moments later the project creation step will conclude and the user will be able to see their project listed in Vivado's 'PROJECT MANAGER' pane as shown below:

Step 2 : Run Synthesis:
Now Click on 'Run Synthesis'

Launch Runs window will show-up, Click on OK

Synthesis will take time (5-10 mins): The user will see a small green activity circle rotating 'Running synth_design', telling that the synthesis is going on, as shown below:

Synthesis Completed Window will then show up, asking 'Next' actions 'Run Implementation', 'Open Synthesized Design', 'View Reports'. Ignore it, click 'Cancel'
There can be 100s of warnings, ignore them as well.