ARM Based SoC design Tutorial : Practical 1.
-Aviral Mittal
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Section 4:
This section deals with generation of binary software code that the processor will run.
This will make use of Keil uVision 5 IDE tool from Keil, which can be download free of charge here.
The user will then have to follow instructions as provided in Keil tutorial on this web site.
Once the User is ok using the Keil tool, then do a new project, call it 'prj4' and add the following files in the project, as described in Keil tutorial:
1. startup.s : Get it here:
2. prj4.c

The prj4.c's listing is shown below:

typedef unsigned int uint32_t;
#define CPU_ID_REG_ADDR (uint32_t *) (0xE000ED00)
#define GPIO_1 *((uint32_t *) (0x20000ff0))
int main ()
  int kk[5]={0xa,0xb,0xc,0xd,0xe};
  int jj;
    uint32_t cpu_id_var;
    const uint32_t cpu_id_val = 0x410FC240;
        cpu_id_var = *(CPU_ID_REG_ADDR);
        if(cpu_id_var == cpu_id_val)
            GPIO_1 = 0x1;
            GPIO_1 = 0x2;

Let us see what the above C-code is doing.
It defines some constants using '#define',
the first one being a pointer to address location (0xE000_ED00). This is the address of the CPU ID register.
the second one is defining the value of the location at address 0x2000_0FF0.
The main() defines some variables, and then in a for loop the 'cpu_id_var' is read from the location of the CPU ID register i.e form the location '0xE000_ED00' then compared to a constant, and if there is a match, the GPIO_1 location (i,e address 0x2000_0FF0) gets a value of 0x1 otherwise it gets a value of 0x2.

One this project is ready in Keil uVision 5, click on 'options for target' icon and then select 'user' tab, and fill in as shown below:

BTW the full command in the above window are not visible: Here it is:
formelf -cvf .\Objects\prj4.axf --vhx --8x1 -o image.hex

A cheat 'image.hex' file is provided here.
You can also use the 'fromelf' utility outside the Keil tool, as described in Keil Tutorial to generate the image.hex file.
One way or the other, you will get your 'image.hex' file which will be needed for RTL simulations.
The above step will also produce a human readable assembly file called disasm.txt.

Now that the 'image.hex' file is obtained, the next step is to run the RTL simulations.


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