E-NOTES
-------
No TCM can be called in a ordinary method.
For example, any TCM cannot be called even from sys.
The only way I could find to put vectors to my design
is to 'start' a TCM form a method.
'sys' is a method, and as per 'e' a TCM can be
'started' from a method. So I wrote
---------------
  run() is also {
    start dut_driver_u1.verify() ;
  };
----------------------------------

the testbench now is able to generate random data
which is now being successfully mapped to
top.dd.
The use of 'pack' and for each is demonstrated here.

The results were found to be satisfactory.

tb.e is now checking the response as well.

Now the problem is to make the checker indpendent
of putter. i.e separate TCMs in separate stucts
should do the job.


Variables declared are used to captured data from
a design. Variable can take the 'type' of the same
struct as was used to 'inject' data, or generate

For example if a struct called
struct my_vec {
  addr : byte;
  data : byte;
  mready : bit;
};

was used to generate data,
it might be used to capture data. To capture
data, someware a variable will be declared
var mycaptured_data my_vec;
data





<'
//basic data structure
  struct my_vec {
                %e_dd   : byte;
                %e_rst  : bit;
                %e_load : bit;
                };
//Note % sign. It is for physcial fields. It is generally used for variable which will
//eventually map to signals/ports in a Design.
//the following struct declares a TCM called inject()
//inject() is supposed to put data on DUT.
//A variable called 'data_pkd' is delcared which is a
//list of bytes.
//The data generated in sys.data_list which is
//a list of my_vec types, randomly is packed
//into a variable data_pkd delcared in this struct.

struct dut_driver  {
  event clk_fall is fall ('top.clk')@sim;
  event data_applied;
  inject() @clk_fall is {
  var data_pkd : list of byte;
   'top.rst' = 0;
   wait [1] * cycle ;
   'top.rst' = 1;
   'top.load' = 1;

// my_vec is the basic data type
// ii is the loop variable
// sys.data_list is a variable declared in sys.
// which is a list of my_vec types
   for each my_vec (ii) in sys.data_list {
     data_pkd = pack(packing.low,ii);
     //out("sizeof data_pkd is",data_pkd.size());
     for each in data_pkd {
       'top.dd' = it;
        emit data_applied;
        out("Applied data is ",it);
        wait cycle;
     };
   };

 
  };// inject() @clk_fall is

};// struct dut_driver

//Following lines of code
//'extends' the devault 'e' struct called 'sys'
//It instantiates a 'dut_driver_u1' that can be
//understood as an object of type 'dut_driver'
//Now since a TCM cannot be called in a method
//and that 'sys' is a method, we are only
//allowed to 'start' our TCM called dut_driver_u1.inject();
extend sys {
  dut_driver_u1 : dut_driver;
  data_list : list of my_vec ;
  keep data_list.size() == 10;
  run() is also {
    start dut_driver_u1.inject() ;
    //start dut_driver_u1.capture() ;
  };
};


'>
-----------------------------------------------
verilog code which the e-code is trying to verify

-----------
module top;
  reg clk;
  reg rst;
  reg load;
  reg [7:0] dd;
  wire [7:0] qq;

  initial
  begin
    clk = 0;
    rst = 0;
    dd  = 0;
    load = 0;
  end
 
  always #50 clk = ~clk;

  myreg myreg(.qq(qq),.dd(dd),.load(load),.clk(clk),.rst(rst));

initial
begin
  #10000 $stop;
end


module myreg(qq,dd,load,clk,rst);
  parameter width = 7;
input [width:0] dd;
input clk,rst,load;
output [width:0] qq;
reg [width:0] qq;
//reg [width:0] qq0;

always @ (posedge clk or negedge rst)
begin
  if(~rst)
    begin
    qq <= 0;
    //qq0 = 0;
    end
  else
    if(load)
    begin
      qq <= dd;
      //qq <= qq0;
    end
end

endmodule

e-test bench
------------------